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 T-Filter with TVS Diode Array For EMI Filtering and ESD Protection
PROTECTION PRODUCTS Description
The STF701 is a low pass T-filter with integrated TVS diodes. It is designed to provide bi-directional unwanted EMI/RFI signals filtering and electrostatic discharge (ESD) protection in portable electronic equipment. Each device will provide filtering and protection for two I/O lines. The STF701 is constructed using thin-film-on-silicon technology. The device has very low insertion loss in the pass band (to approximately 10MHz) and good attenuation at high frequencies (approximately 100MHz to 1GHz). Each line features two stages of TVS diode protection. The TVS diodes provide effective suppression of ESD voltages in excess of 15kV (air discharge) and 8kV (contact discharge) per IEC 610004-2, level 4. The clamping characteristics of the device are optimized by the use of two TVS diodes. The TVS diodes serve a dual purpose of protecting the internal capacitor and the sensitive IC connected to the line. The voltage divider action of the circuit means the voltage across the protected IC will be very close to the breakdown voltage (VBR) of the second TVS. The small size and integrated feature of the STF701 minimizes required board space and increases system reliability. The STF701 is suitable for use in portable communications devices such as cellular handsets and accessory kits.
STF701
Features
u Bidirectional EMI/RFI filtering with integrated ESD u u u u u u u u u u u u u u u u u u
protection ESD protection to IEC 61000-4-2 Level 4 Filtering and ESD protection for two data lines Low insertion loss to 10MHz Good attenuation of high frequency signals Low TVS operating voltage (5V) Low clamping voltage Low leakage current Thin-film-on-silicon technology
Mechanical Characteristics
EIAJ SC70-5L package Molding compound flammability rating: UL 94V-0 Marking : 701 Packaging : Tape and Reel per EIA 481
Applications
Cell phone handsets Cell phone accessories RF Communications equipment Laptop Computers Two-way pagers GPS Devices
Circuit Diagram
Schematic & PIN Configuration
SC70-5L (Top View)
Revision 9/2000 1 www.semtech.com
STF701
PROTECTION PRODUCTS Absolute Maximum Rating
R ating Steady-State Pow er ESD Air Discharge p er IEC 61000-4-2 ESD Contact Discharge p er IEC 61000-4-2 Lead Soldering Temp erature Op erating Temp erature Storage Temp erature Symbo l Pp k V PP V PP TL TJ TSTG Value 100 15 8 260 (10 sec.) -20 to +125 -55 to +150 Units mW kV kV C C C
Electrical Characteristics
STF701 Par ame te r T VS Reverse Stand-Off Voltage T VS Reverse Breakdow n Voltage T VS Reverse Leakage Current T VS Reverse Leakage Current T VS Junction Cap acitance Symbo l V RWM V BR IR IR Cj It = 1mA VRWM = 5V, T=25C VRWM = 3.3V, T=25C Betw een I/O p ins and Gnd, each device V R = 0V, f = 1MHz Each Line Each Line Betw een Inp ut and Outp ut, each Line V R = 0V, f = 1MHz 45 65 6 5 1 Co nd itio ns Minimum Typ ical Maximum 5 Units V V A A V
Total Series Resistance Cap acitor Total Cap acitance
R C CTOT
50 100 230
55
W pF pF
a 2000 Semtech Corp.
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STF701
PROTECTION PRODUCTS Typical Characteristics
Normalized Breakdown Voltage vs. Temperature
1.1 1.1
Normalized Resistance vs. Temperature
1.05
1.05
|VBR|
1
|R| -40 10 60 Temperature (OC) 110
1
0.95
0.95
0.9
0.9 -40 10 60 Temperature (OC) 110
Typical Insertion Loss
ESD Clamping (8kV Contact per IEC 61000-4-2)
Fr e que ncy 100MHz 1GHz
Atte nuatio n -10.75dB -14.71dB
Measurement taken with Hewlett Packard Model 8753E Network Analyzer
a 2000 Semtech Corp.
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STF701
PROTECTION PRODUCTS Applications Information
Device Connection for Protection of Two Data Lines The STF701 is designed to provide EMI filtering and ESD protection for two I/O lines. The equivalent circuit diagram is shown in Figure 1. The device is connected as follows: 1. Line 1 is connected at pins 1 & 5 and line 2 is connected at pins 3 & 4 (Figure 2). The device is symmetrical so input & output connections can be made on either side of the device. Pin 2 is connected to ground. The ground connection should be made directly to the ground plane for best results. The path length is kept as short as possible to reduce the effects of parasitic inductance in the board traces. Voltage Clamping Characteristics. The clamping characteristics of the STF701 are optimized by the use of two TVS diodes in the protection circuit (Figure 3). An ESD strike on the protected line will be initially suppressed by the first TVS diode. The voltage across the TVS will be the clamping voltage of the device (VC1) given by: VC1 = Vbr + RD * IPP where Vbr = Breakdown voltage of the TVS RD = Dynamic resistance of the TVS IPP = Peak pulse (ESD) current The dynamic resistance of the TVS is very small, typically < 0.5W. The second TVS will be subjected to VC1 through the voltage divider formed by the series resistor (R) and the dynamic resistance of the TVS. Since R >> RD then by the voltage divider theorem, the voltage seen by the protected IC will be a few millivolts above the breakdown voltage (Vbr) of the second TVS.
Figure 2 - STF701 Connection Diagram Figure 1 - STF701 Circuit Diagram
Figure 3 - STF701 Clamping Characteristics
a 2000 Semtech Corp.
4
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STF701
PROTECTION PRODUCTS Outline Drawing - SC70-5L
Land Pattern - SC70-5L
a 2000 Semtech Corp.
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STF701
PROTECTION PRODUCTS Marking Codes
Par t Numbe r STF701 Mar king Co d e F1
Ordering Information
Par t Numbe r STF701.TC STF701.TG Wo r king Vo ltage 5V 5V Qty p e r R e e l 3,000 10,000 R e e l Size 7 Inch 13 Inch
Contact Information
Semtech Corporation Protection Products Division 652 Mitchell Rd., Newbury Park, CA 91320 Phone: (805)498-2111 FAX (805)498-3804
a 2000 Semtech Corp. 6 www.semtech.com


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